Overview

Informative

What the I2C driver is, its boundaries, and where it sits. Non-binding orientation; the normative contract is in I2c — Requirements. The driver builds on the shared foundation (type system, error model, naming, memory mapping) in General.

In one sentence: the I2C driver (I2cDrv) provides a thin, portable abstraction over an I2C controller — it transfers bytes on the I2C bus with each channel acting as a controller or a target, and reports events to the integration code.

What it does

  • Brings the driver and its channels up and down and reports each channel’s state.

  • Transfers bytes in controller mode (initiates transactions) and target mode (responds to a controller), issuing START / repeated-START / STOP as required.

  • Handles events in either interrupt or polling mode, per channel, and notifies the integration code via the I2c_Callout_On* callouts.

What it does not do

  • 7-bit addressing only — no 10-bit addressing.

  • No general call (address 0x00) and no multi-controller arbitration beyond reporting a lost-arbitration runtime error.

  • No clock stretching where the hardware does not support it.

  • No higher-level protocol on top of I2C — command sets and register maps belong to the upper layer.

  • No system-resource setup — clock, port pins, and interrupt controller are prerequisites another module configures before I2c_Init.

Where it sits

        flowchart TB
   INTEG["Integration code<br/>(I2c_Callout_Stubs.c)"]
   DRV["Chiisai I2C Driver"]
   HWA["Hardware abstraction<br/>(clock, port, interrupt)"]
   HW["I2C controller hardware"]

   INTEG -->|"I2c_Init, I2c_StartTxTransaction,<br/>I2c_StartRxTransaction, ..."| DRV
   DRV -->|"I2c_Callout_On* callouts<br/>(OnReception, OnTransmission,<br/>OnError, OnAddress)"| INTEG
   DRV --> HWA
   HWA --> HW

   classDef driver fill:#FEDCD2,stroke:#c66,stroke-width:2px;
   class DRV driver;

The hardware-abstraction layer (clock, port pins, interrupt controller) is set up by other modules before I2c_Init; the I2C driver assumes it is ready.

Dependencies

Depends on

For

System resources (clock, port, interrupt)

Bit timing, pin routing, and interrupt configuration for the I2C controller. These must be set up by another module before I2c_Init.

Callouts and expected interfaces

The callouts and services the driver calls into (I2c_Callout_On*, which the integrator implements in I2c_Callout_Stubs.c; LogM_Report; and optional critical-section services). See API Reference → Callouts the integrator provides.

The shared foundation

The common type system, compiler abstraction, error model, naming scheme, and memory mapping defined in General.

References

No.

Document

[1]

The Chiisai HAL General part — the shared contract this module builds on.

[2]

UM10204 — I2C-bus specification and user manual (NXP Semiconductors).