Overview

Informative

What the Port driver is, its boundaries, and where it sits. Non-binding orientation; the normative contract is in Port — Requirements. The driver builds on the shared foundation (type system, error model, naming, memory mapping) in General.

In one sentence: the Port driver (PortDrv) provides a thin, portable abstraction over the MCU’s general-purpose I/O — it initialises pin functions and directions from configuration, reads and writes pin and port values, toggles pins, and reports pin-edge events to the integration code.

What it does

  • Brings all configured pins up to their configured function, direction, and initial value (Port_Init) — glitch-free.

  • Reads a single pin (Port_GetPinValue) or a whole port at once (Port_GetPortValue).

  • Writes a single pin (Port_SetPinValue), toggles it (Port_TogglePinValue), or writes selected pins of a port atomically through a bitmask (Port_SetMaskedPortValue).

  • Detects pin edges (Port_SetEdgeDetection) and reports them to the integration code via Port_Callout_OnEdgeDetection, serviced in either interrupt or polling mode.

What it does not do

  • No runtime pin reconfiguration — a pin’s function and direction are fixed at Port_Init; there is no API to change them afterwards (edge detection is the only runtime-settable attribute).

  • No defined behavior for Set-on-input — writing an input pin (e.g. to steer an internal pull-up/down) is left implementation-defined.

  • No higher-level pin protocol — PWM, analog, or bus alternate functions are selected as a pin mode at configuration time; driving those peripherals belongs to their own drivers.

  • No de-init and no instances — the PortDrv is a single-instance driver brought up once.

Where it sits

        flowchart TB
   INTEG["Integration code<br/>(Port_Callout_Stubs.c)"]
   DRV["Chiisai Port Driver"]
   HW["GPIO hardware"]

   INTEG -->|"Port_Init, Port_GetPinValue,<br/>Port_SetPinValue, Port_SetEdgeDetection, ..."| DRV
   DRV -->|"Port_Callout_OnEdgeDetection"| INTEG
   DRV --> HW

   classDef driver fill:#FEDCD2,stroke:#c66,stroke-width:2px;
   class DRV driver;

The PortDrv is typically brought up very early in boot (after the MCU clock tree), because other drivers rely on their pins already being routed and configured.

Dependencies

Depends on

For

Callouts and expected interfaces

The services the driver calls back into (Port_Callout_OnEdgeDetection, LogM_Report for errors, and optional critical-section services). See API Reference → Callouts the integrator provides.

The shared foundation

The common type system, compiler abstraction, error model, naming scheme, and memory mapping defined in General.

References

No.

Document

[1]

The Chiisai HAL General part — the shared contract this module builds on.